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| Preliminary Data Sheet No. PD60035J IR2152 Features * Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Undervoltage lockout Programmable oscillator frequency (NOTE: For new designs, we recommend IR's new products IR2154 and IR21541) SELF-OSCILLATING HALF-BRIDGE DRIVER Product Summary VOFFSET Duty Cycle IO+/VOUT Deadtime (typ.) 600V max. 50% 100 mA / 210 mA 10 - 20V 1.2 s * * f= * Matched propagation delay for both channels * Low side output in phase with RT 1 1.4 x (RT + 75) x CT Description The IR2152 is a high voltage, high speed, selfoscillating power MOSFET and IGBT driver with both high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The front end features a programmable oscillator which is similar to the 555 timer. The output drivers feature a high pulse current buffer stage and an internal deadtime designed for minimum driver cross-conduction. Propagation delays for the two channels are matched to simplify use in 50% duty cycle applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration that operates off a high voltage rail up to 600 volts. Packages 8 Lead PDIP 8 Lead SOIC Typical Connection up to 600V VCC RT CT COM VB HO VS LO TO LOAD (Refer to Lead Assignment diagram for correct pin configuration) 1 IR2152 Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Symbol VB VS VHO VLO VRT VCT ICC IRT dVs/dt PD RTHJA TJ TS TL Definition High side floating supply voltage High side floating supply offset voltage High side floating output voltage Low side output voltage RT voltage CT voltage Supply current (note 1) RT output vurrent Allowable offset supply voltage transient Package power dissipation @ TA +25C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (8 Lead DIP) (8 Lead SOIC) (8 Lead DIP) (8 Lead SOIC) Min. -0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 -- -5 -- -- -- -- -- -- -55 -- Max. 625 VB + 0.3 VB + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 25 5 50 1.0 0.625 125 200 150 150 300 Units V mA V/ns W C/W C Recommended Operating Conditions The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential. Symbol VB VS VHO VLO ICC TA Note 1: Definition High Side Floating Supply Absolute Voltage High Side Floating Supply Offset Voltage High Side Floating Output Voltage Low Side Output Voltage Supply Current (Note 1) Ambient Temperature Min. VS + 10 -- VS 0 -- -40 Max. VS + 20 600 VB VCC 5 125 Units V mA C Because of the IR2152's application specificity toward off-line supply systems, this IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Therefore, the IC supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value resistor connected between the chip VCC and the rectified line voltage and a local decoupling capacitor from VCC to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. Therefore, this circuit should not be driven by a DC, low impedance power source of greater than VCLAMP. 2 www.irf.com IR2152 Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 12V, C L = 1000 pF and TA = 25C unless otherwise specified. Symbol tr tf DT D Definition Turn-on rise time Turn-off fall time Deadtime RT duty cycle Min. Typ. Max. Units Test Conditions -- -- 0.50 48 80 40 1.20 50 120 70 2.25 52 ns s % Static Electrical Characteristics VBIAS (VCC, VBS) = 12V, CL = 1000 pF, CT = 1 nF and TA = 25C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to COM. The VO and I O parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol fOSC VCLAMP VCT+ VCTVCTUV VRT+ VRTVRTUV VOH VOL ILK IQBS IQCC ICT VCCUV+ VCCUVVCCUVH IO+ IO- Definition Oscillator frequency VCC zener shunt clamp voltage 2/3 VCC threshold 1/3 VCC threshold CT undervoltage lockout, VCC - CT RT high level output voltage, VCC - RT RT low level output voltage RT undervoltage lockout High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current CT input current VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold VCC supply undervoltage lockout hysteresis Output high short circuit pulsed current Output low short circuit pulsed current Min. Typ. Max. Units Test Conditions 19.4 94 14.4 7.8 3.8 -- -- -- -- -- -- -- -- -- -- -- -- 7.7 7.4 200 100 210 20.0 100 15.6 8.0 4.0 20 0 200 20 200 0 -- -- -- 10 400 0.001 8.4 8.1 500 125 250 20.6 106 16.8 8.2 4.2 50 100 300 50 300 100 100 100 50 50 950 1.0 9.2 8.9 -- -- -- V A mV 2.5V www.irf.com 3 IR2152 Functional Block Diagram VB UV DETECT RT R + R + R R S Q Q V CC 15.6V DEAD TIME DELAY LO DEAD TIME PULSE GEN HV LEVEL SHIFT Q PULSE FILTER R S VS HO CT COM Lead Definitions Symbol Description RT CT Oscillator timing resistor input,in phase with HO for normal IC operation Oscillator timing capacitor input, the oscillator frequency according to the following equation: f= VB HO VS VCC LO COM 1 1.4 x (RT + 75) x CT where 75 is the effective impedance of the RT output stage High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return Lead Assignments 8 Lead PDIP 8 Lead SOIC IR2152 4 IR2152S www.irf.com IR2152 8 Lead PDIP 01-3003 01 8 Lead SOIC www.irf.com 01-0021 08 5 IR2152 VCCUV+ VCC VCLAMP RT (LO) 50% CT RT 50% RT (HO) tr tf 90% 90% HO LO LO HO Figure 1. Input/Output Timing Diagram 10% 10% Figure 2. Switching Time Waveform Definitions RT 50% 50% 90% LO HO 90% 10% DT 10% Figure 3. Deadtime Waveform Definitions WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 http://www.irf.com/ Data and specifications subject to change without notice. 3/29/2001 6 www.irf.com |
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